IDX=MPU_0
Fault status
IDX | The fault source index for which fault information is captured in DATA0 through DATA3. The fault information is fault source specific and described below. Note: this register field (and associated fault source data in DATA0 through DATA3) should only be considered valid, when VALID is ‘1’. 0 (MPU_0): Bus master 0 MPU/SMPU. DATA0[31:0]: Violating address. DATA1[0]: User read. DATA1[1]: User write. DATA1[2]: User execute. DATA1[3]: Privileged read. DATA1[4]: Privileged write. DATA1[5]: Privileged execute. DATA1[6]: Non-secure. DATA1[11:8]: Master identifier. DATA1[15:12]: Protection context identifier. DATA1[31]: ‘0’ MPU violation; ‘1’: SMPU violation. 1 (MPU_1): Bus master 1 MPU. See MPU_0 description. 2 (MPU_2): Bus master 2 MPU. See MPU_0 description. 3 (MPU_3): Bus master 3 MPU. See MPU_0 description. 4 (MPU_4): Bus master 4 MPU. See MPU_0 description. 5 (MPU_5): Bus master 5 MPU. See MPU_0 description. 6 (MPU_6): Bus master 6 MPU. See MPU_0 description. 7 (MPU_7): Bus master 7 MPU. See MPU_0 description. 8 (MPU_8): Bus master 8 MPU. See MPU_0 description. 9 (MPU_9): Bus master 9 MPU. See MPU_0 description. 10 (MPU_10): Bus master 10 MPU. See MPU_0 description. 11 (MPU_11): Bus master 11 MPU. See MPU_0 description. 12 (MPU_12): Bus master 12 MPU. See MPU_0 description. 13 (MPU_13): Bus master 13 MPU. See MPU_0 description. 14 (MPU_14): Bus master 14 MPU. See MPU_0 description. 15 (MPU_15): Bus master 15 MPU. See MPU_0 description. 16 (CM4_SYS_MPU): CM4 system bus AHB-Lite interface MPU. See MPU_0 description. 28 (MS_PPU_0): Peripheral master interface 0 PPU. DATA0[31:0]: Violating address. DATA1[0]: User read. DATA1[1]: User write. DATA1[2]: User execute. DATA1[3]: Privileged read. DATA1[4]: Privileged write. DATA1[5]: Privileged execute. DATA1[6]: Non-secure. DATA1[11:8]: Master identifier. DATA1[15:12]: Protection context identifier. DATA1[31]: ‘0’: PPU violation, ‘1’: peripheral bus error. 29 (MS_PPU_1): Peripheral master interface 0 PPU. See MS_PPU_0 description. 30 (MS_PPU_2): Peripheral master interface 1 PPU. See MS_PPU_0 description. 31 (MS_PPU_3): Peripheral master interface 2 PPU. See MS_PPU_0 description. 32 (GROUP_PPU_0): Peripheral group 0 PPU. DATA0[31:0]: Violating address. DATA1[0]: User read. DATA1[1]: User write. DATA1[2]: User execute. DATA1[3]: Privileged read. DATA1[4]: Privileged write. DATA1[5]: Privileged execute. DATA1[6]: Non-secure. DATA1[11:8]: Master identifier. DATA1[15:12]: Protection context identifier. DATA1[31:30]: ‘0’: PPU violation, ‘1’: timeout detected, ‘2’: peripheral bus error. 33 (GROUP_PPU_1): Peripheral group 1 PPU. See GROUP_PPU_0 description. 34 (GROUP_PPU_2): Peripheral group 2 PPU. See GROUP_PPU_0 description. 35 (GROUP_PPU_3): Peripheral group 3 PPU. See GROUP_PPU_0 description. 36 (GROUP_PPU_4): Peripheral group 4 PPU. See GROUP_PPU_0 description. 37 (GROUP_PPU_5): Peripheral group 5 PPU. See GROUP_PPU_0 description. 38 (GROUP_PPU_6): Peripheral group 6 PPU. See GROUP_PPU_0 description. 39 (GROUP_PPU_7): Peripheral group 7 PPU. See GROUP_PPU_0 description. 40 (GROUP_PPU_8): Peripheral group 8 PPU. See GROUP_PPU_0 description. 41 (GROUP_PPU_9): Peripheral group 9 PPU. See GROUP_PPU_0 description. 42 (GROUP_PPU_10): Peripheral group 10 PPU. See GROUP_PPU_0 description. 43 (GROUP_PPU_11): Peripheral group 11 PPU. See GROUP_PPU_0 description. 44 (GROUP_PPU_12): Peripheral group 12 PPU. See GROUP_PPU_0 description. 45 (GROUP_PPU_13): Peripheral group 13 PPU. See GROUP_PPU_0 description. 46 (GROUP_PPU_14): Peripheral group 14 PPU. See GROUP_PPU_0 description. 47 (GROUP_PPU_15): Peripheral group 15 PPU. See GROUP_PPU_0 description. 50 (FLASHC_MAIN_BUS_ERROR): Flash controller, main interface, bus error: FAULT_DATA0[31:0]: Violating address. FAULT_DATA1[31]: ‘0’: FLASH macro interface bus error; ‘1’: memory hole. FAULT_DATA1[15:12]: Protection context identifier. FAULT_DATA1[11:8]: Master identifier. |
VALID | Valid indication: ‘0’: Invalid. ‘1’: Valid. HW sets this field to ‘1’ when new fault source data is captured. New fault source data is ONLY captured when VALID is ‘0’. SW can clear this field to ‘0’ when the fault is handled (by SW). |